Electron ‘spin’ in silicon will lead to revolutionary quantum chips
Researchers forecast “paradigm shift in information and communication technologyâ€?
A silicon-based nanoscale system which aims to harness the ‘spin’ of electrons to boost the processing power of future computer systems is being developed by researchers at the University of Southampton, jointly with the University of Cambridge, the NTT Basic Research Laboratories and the Hitachi Cambridge Laboratory.
The three-year project, which has just received funding of £1M from the Engineering and Physical Sciences Research Council (EPSRC) aims to build the world’s first silicon-based integrated single-spin quantum bit system.
According to Professor Hiroshi Mizuta, Head of the Nano Research Group at the University’s School of Electronics and Computer Science (ECS), the new system will enable researchers working with silicon to initialise, manipulate and read single-electron’s ‘spin’ states rather than just charge states. In the past, it has been possible to capture just electronic charge. The advantage of employing spin rather than charge is that spin can maintain coherence and is hardly destroyed by interference in silicon or graphene. The approach will also enable the development of novel nanospintronic devices - nanoscale circuits that could use the spin of the individual electrons to transmit, store and process information. In principle, such devices could dramatically enhance scaling of functional density and performance while simultaneously reducing the energy dissipated per functional operation. As well as boosting the processing power of conventional computers, this could also be used in quantum computers.
“This project is a paradigm shift in information and communication technology (ICT),â€? said Professor Mizuta. “It is not just an extension of existing silicon technology; we have introduced a completely new principle based on quantum mechanics, which will make it possible for industry to continue to use silicon as devices get smaller.â€?
The research team, which consists of the ECS Nano Research Group, the University of Cambridge, Hitachi Cambridge Laboratory and NTT Basic Research Laboratories, will develop an integrated single-spin information processing technology, which will provide a unique solution to massively-parallel and highly-secure information processing technology in the "beyond CMOS (Complementary Metal-Oxide-Semiconductor) era.