Date:

2003-2007

Theme:

Nanoelectronics

The continued scaling of MOSFETs to the deca-nanometre regime has reached the point where the transistor size is now comparable with the grain size in a polysilicon film (typically 100-200nm). The time is therefore right to research processing techniques that would allow a transistor to be fabricated inside a grain of polysilicon. Such transistors would be expected to have significantly better performance than thin film transistors (TFTs) because grain boundaries would be eliminated from the channel region. The transistor performance might also approach that achievable in single-crystal silicon if good control could be obtained over the quality of the silicon inside the polysilicon grain. The applications for transistor-in-a-grain technology would potentially be enormous, and would include high-performance large area electronics, displays and any technology where low temperature processing was required. In the longer term, this technology may also be attractive for post-scaling CMOS, since it would enable 3D CMOS technologies to be implemented.

Layers of polycrystalline silicon self-assemble during growth and hence the positions of the grains and grain boundaries are random. The key issue in researching transistor-in-a-grain technology is therefore to devise processing techniques that allow the polysilicon grains to be precisely located with respect to the position of the transistor. This research investigates grain localization techniques and transistor architectures for transistor-in-grain technology. Two novel methods of low temperature crystallization of amorphous silicon are researched to increase the grain size and control the grain boundary locations. One method uses fluorine during metal induced lateral crystallization (MILC) of α-Si, which suppresses random grain nucleation during crystallization anneal and increases the laterally crystallized distance. Fluorine implantation also significantly reduces the density of the nickel-silicide precipitates and improves the grain texture in the laterally crystallized silicon. Another method employs a germanium seed and gives crystallization from the perimeter of the germanium seed. This is a new crystallization mechanism that has not been reported previously and has the advantage that crystallization can be achieved without any metal contamination. These methods of devising high quality poly-silicon layer have considerable commercial potential for a number of devices like thin film transistors for large area electronics, transistor-in-grain for 3D CMOS, thin film solar cells, sensor applications in a cost effective thin film based nanowire technology and any devices where low temperature processing is required.

Primary investigator

• pa

Secondary investigator

• mmah

Associated research groups

• Nano Research Group
• Southampton Nanofabrication Centre

Date:

2007-2010

Theme:

Nanoelectronics

Funding:

EPSRC

This research aims to investigate the use of CMOS-compatible vertical MOSFETs for the implementation of medium-power RF circuits, opening the way to higher integration of RF systems. Vertical transistors are currently of interest because they offer an alternative route to ultra-short channel MOS transistors with relaxed lithography requirements (and hence considerably lower costs), decouple gate length from the packing density and provide improved current drive per unit silicon area compared with conventional lateral CMOS. In this research approaches will be investigated that deliver these benefits through the integration of vertical MOSFETs in a mature CMOS technology with minimum additional masks above those required for standard 0.5 micron CMOS. The intention is to appraise in depth, the feasibility of this novel technology for the manufacture of low-cost RF solutions.

The challenges of vertical MOSFETs for RF applications are high overlap capacitance, short channel effects, susceptibility to dry etch damage and the lack of an appropriate silicidation technology. A detail investigation has been done to deliver solutions for challenges like overlap capacitance, short channel effects and dry etch damage. A CMOS compatible Fillet Local Oxidation (FILOX) process has been developed and novel structures (frame gate) proposed to reduce the overlap capacitance and to eliminate dry etch damage associated device degradation. The resulting transistors are found to have significantly improved immunity to short channel effects, with near ideal sub-threshold slopes of 70 to 80 mV/decade, and DIBL of 30 to 35 mV/V. More recently we have developed for the first time a silicidation technology for surround gate vertical MOSFETs. The technology uses a double spacer comprising a polysilicon spacer for the surround gate and a nitride spacer for the silicidation. For a 120 nm channel length, silicided frame gate vertical nMOSFETs show a 30% improvement in the drive current with an excellent sub-threshold slope of 78mV/decade and a DIBL of 30 mV/V. For an 80 nm channel length, a 43% improvement in the drive current is obtained. Vertical transistors with our FILOX process and silicidation resulted in a transistor with low overlap capacitance and high transistor transconductance. While conventional planar nMOS devices exhibit a fT of 10 GHZ in a 0.5 micron technology node, our vertical nMOS devices fabricated by above mentioned FILOX and silicidation process demonstrating a fT of 20 GHZ in the same technology node. We are currently investigating several RF circuits with verical nMOS devices aimed at the highly lucrative 1-10 GHz market.

Primary investigators

• pa
• Steve Hall
• Bill Redman-White
• Octavian Buiu

Secondary investigators

• mmah
• Lizhe Tan

Partner

• University of Liverpool

Associated research groups

• Nano Research Group
• Southampton Nanofabrication Centre

Date:

2007-2009

Themes:

Microfluidics and Lab-on-a-chip, Bio-inspired computing

Living cells are arguably sophisticated unconventional computers equipped with properties difficult to archive with silicon-based computing architectures. However, limited access to (intra)cellular processes is a problem for this novel computing substrate. Although optical interfaces so far have been conventionally adopted as the common method, this often requires bulky setup, such as microscopes, and thus is hard to miniaturise the whole system. We developed an alternative interface device using the electrical impedance spectroscopy (EIS) technique to access the molecular computing processes. The plasmodium of true slime mould, Physaurm polycephalum, is interfaced to the EIS hardware, together with the microfluidic system. This enables a compact monitoring system for the cell's reactions to various external signals. At the talk, we will review our approaches for bio-hybrid devices, robot controller and biosensor, using the electrical interface and the Physarum cell.

Primary investigators

• st07v
• Klaus-Peter Zauner
• Hywel Morgan

Associated research groups

• Science and Engineering of Natural Systems Group
• Nano Research Group

Date:

2005-2009

Theme:

Microfluidics and Lab-on-a-chip

Funding:

Ministry of Higher Education, Malaysia, University of Putra Malaysia (UPM) and Royal Academy of Engineering

A novel separation device uses dielectrophoresis to achieve 100% non-contact separation of a mixture of particles. The method is continuous and flow through, involves no fouling and ensuring longevity of operation. It is sensitive to medium conductivity, applied frequency and voltage. This project will present a characterisation of a microfluidic device using an incorporating angled microelectrode arrays for the continuous dielectrophoretic separation of particles. The characterisation is essential to get specific indication for each particle type deflects, behaves and hence separated at the end of the arrays. A new optimised device design consists of sequential interdigitated electrode arrays with angle of 60 degree is introduced. This device uses negative dielectrophoresis to achieve gradual deflection through the sequential influence of the electrodes in the array. A microfluidic channel is made using two layers of dry film resist SY320 with its thickness reduces to approximately 30µm height, which then could increase the dielectrophoretic force. The data is examined by measuring deflection of particle from the side wall against frequency at different voltage applied. When a mixture of particles of 2µm and 1µm are in the channel, they can then physically be separated along the arrays achieving 100% spatial separation at the outlet of the channel simply by means of a channel junction with as low as operating voltage of 10V. The project will discuss results obtained and the optimisation of separation that is achievable by choice of frequency and voltage.

Primary investigators

• namy05r
• Nicolas Green

Associated research group

• Nano Research Group

Date:

2006-2009

Themes:

Nanophotonics and Biomimetics, Biomimetics

Funding:

Department

Over 500 million years of evolution have created highly optimised optical solutions for the survival of the species. By definition the optical devices created are fabricated in organic materials, so further optimisation is possible by utilising materials that cannot be incorporated by living systems. Our research searches the living world for innovative optical designs and then analyses Nature's solution to a particular optical problem. Nature's solution is then modelled and improved by a combination of incorporating advanced materials and evolutionary algorithms (which take Nature's current day solution further into the future). As an example of the practical application of this research, a study of the structural colour produced by the Morpho Rhetenor butterfly wing led to the creation of a new type of photonic crystal structure for which a Patent has been granted.

Primary investigator

• Professor Greg Parker

Secondary investigator

• Michael Pollard

Associated research groups

• Nano Research Group
• Southampton Nanofabrication Centre

Date:

2009-2009

Theme:

Interaction with Knowledge and semantics

Funding:

JISC

The Innovation Base is a structured place to share models of higher education. They can be any type of model including use cases, scenarios, models of processes and information models; and they can be in any format including images of drawings, text descriptions and formal models created in a language such as BPMN, UML or Archimate.

The aims of the Innovation Base (IB) are to:

• Act as a structured central location for the deposit of models of higher education.
• Support sharing of models in order to reduce duplication of effort and help the community to identify common processes that may justify shared services or common action.
• Help project teams and programmes to share the outputs of projects in ways in which people can make better user of them.

What makes the Innovation Base different from previous attempts to produce models is it's agnosticism as to the method or approach that was used to create the knowledge that it holds. For example the IB can take knowledge that has been generated from role analysis using the Higher Education Role Analysis (HERA) method, information on enterprise architectures created using The Open Group Architecture Framework (TOGAF) method or developments using agile development methods.

It is specifically designed to enable users to add information that they have, in the form in which they have it. This might be a sketch of a business process through to a full enterprise architecture model in a formal notation.

The IB offers depositors some support for the modelling that they are undertaking by offering guidance for producing modelling constructs such as the development of business process models, information models, use cases and scenarios.

Primary investigator

• David Millard

Secondary investigator

• Yvonne Howard

Partner

• University of Manchester

Associated research group

• Learning Societies Lab

Date:

2008-2009

Themes:

Technology Enhanced Learning, Assessment

Funding:

JISC

The MathAssess project aims to build on the significant investment JISC has made in QTI as an open standard in the e-assessment arena and supported the development of open source tool kits such as ASDEL, AQURATE and Minibix . By enhancing these toolkits and integrating with Maxima, a computer algebra system, MathAssess will shown how the specific needs of mathematics can be catered for using open content interoperability standards and open source software.

MathAssess acknowledged long-established user needs in mathematics e-assessment – diagnostic, formative and summative – providing for the delivery of truly randomised questions and tests, with hints, solutions and feedback being available to students at all appropriate stages. The project will bring together the mathematics community’s decades of experience creating and using on-line resources with a commitment to open standards with the aim of overcoming long-standing problems with lock-in and obsolescence.

Primary investigators

• Gary Wills
• Lester Gilbert

Associated research groups

• Learning Societies Lab
• Electronic and Software Systems

Date:

2008-2012

Themes:

Algorithms for Wireless Sensor Networks, Decentralised Information Systems, Agent Based Computing, Intelligent Systems and Machine Learning, Decentralised Architectures

We are entering a new age in the evolution of computer systems, in which pervasive computing technologies seamlessly interact with human users [Satyanarayanan, 2001;Weiser, 1991]. These technologies serve people in their everyday lives at home and work by functioning invisibly in the background. They free them from tedious routine tasks and create a smart environment around them [Cook and Das, 2004]. In the influential article “The Computer for the 21st Century�, Mark Weiser described smart environments as a “physical world that is richly and invisibly interwoven with sensors, actuators, displays, and computational elements, embedded seamlessly in the everyday objects of our lives, and connected through a continuous network� [Weiser, 1991]. For example, this would be an intelligent building, or a smart traffic control system. Now, since such smart environments need information about their surroundings, they rely first and foremost on sensory data from the real world. More accurately, this data is provided by wireless sensor networks, which are responsible for sensing as well as for information collecting [Lewis, 2004]. Thus, improving the efficiency of these tasks in the networks of wireless sensors is of necessity. Given this, we will focus on efficient long-term (e.g. lifetime-long) information collection of these networks, using learning-theory to tackle this challenge.

Primary investigators

• Long Tran-Thanh
• Nick Jennings
• acr

Associated research group

• Agents, Interaction and Complexity