Bipolar transistors are mainly used in BiCMOS technologies where circuit operation at very high frequencies is required. Silicon germanium heterojunction bipolar transistors (HBTs) have been produced with cut-off frequencies above 200GHz. Such transistors are ideal for use in radio frequency circuits in mobile communications products. Another important application is optical communications, where SiGe HBTs have been used to produce circuits that operate at 40Gbit/s. In all these applications, the rf performance can be significantly improved if the HBTs are produced on Silicon-On-Insulator substrates. HBTs on SOI is a new research field and only two other groups around the world have reported HBT on insulator devices. At Southampton, a novel growth process has been developed that combines selective growth of the Si collector with non-selective growth of the SiGe base and the Si cap. This process has the advantage of simplicity, since it halves the number of epitaxy steps needed to produce an HBT and eliminates the requirement for LOCOS or shallow trench isolation. SiGe HBTs have been successfully produced on SOI substrates using this combined selective/non-selective growth process. The inclusion of carbon in the SiGe base is currently being investigated, since it reduces boron transient enhanced diffusion and hence allows thinner bases to be produced.
A theoretical investigation into the performance and robustness of nonlinear controllers.
Progress in integrated circuit (IC) technology has been achieved by reduction in the total area of individual transistors, resulting in an increase of speed accompanied by dramatic increase in density of device and interconnect integration. However, the metal oxide semiconductor field-effect transistor (MOSFET) has physical limits for reduction due to both short-channel effects, and the size of the area taken up by source and drain contacts and doping wells. To overcome these limits and to realize even smaller transistors, a device based on a novel operating principle is required. Furthermore, the introduction of high-k dielectrics and metal gates renders obsolete one of the key elements of Si technology scaling, the thermal growth of silicon dioxide as the gate insulator. A revolutionary non-Si based transistor might hence have a real shot at replacing CMOS technology.
The proposed metal oxide tunnel transistor (MOTT) is a device in which the tunnel probability through an insulating layer is modulated by a gate electrode. Source and drain of the device are metallic and no semiconductors are required in the process. This means that the source and drain contact areas are minimized and that no short channel effects can exist. High speed operation is expected since no minority carriers are involved. Furthermore the transistor can be grown on flexible substrates, and it is imaginable that three-dimensional circuits can be developed.
Over the past 20 years, the channel length of MOS transistors has halved at intervals of approximately every two or three years, which has led to a virtuous circle of increasing packing density (more complex electronic products), increasing performance (higher clock frequencies) and decreasing costs per unit silicon area. To continue on this path, Research is underway at Southampton University to investigate an alternative method of fabricating short-channel MOS transistors, socalled Vertical MOSFET's. In these devices the channel is perpendicular to the wafer surface in stead of in the plane of the surface. Vetical MOSFET's have three main advantages:
The project is concerned with the investigation of using micromachining techniques to design and realise Atom Chips. Clouds of atoms are levitated by magnetic fields above a silicon surface and guided along pathways. This is achieved by passing current through wires creating the magnetic fields. Additionally, the atoms clouds interact with photons which are brought to the atom clouds by optical waveguides. Applications are for highly sensitive interferometers, gates for quantum computers and gravity measurement sensors. MEMS fabrication techniques to be developed require to electroplate the high-current density wires on a silicon substrate and a micromirror actuated by a comb drive which is required for the optical readout. Another important aspect is the integration of optical fibres on the same chip. These fibres can be used for novel modulation techniques used in optical data communications systems.
Micromachined actuators have a range of applications, e.g. for the integration of an Atomic Force Microscope (AFM) on a single chip, novel lithography techniques, micro-switches, etc. The project investigates thermal actuators to realise movement along three axes. A micro-fabrication process has been developed that allows to produce in-plane bimorphs consisting of aluminium and silicon. An actuator stage is being designed having a platform on which an atomically sharp tip can be placed. This can be used for scanning an area of a sample, thus obtaining an image of the sample topology. The actuators incorporate piezo-resistors which result in a resistance change proportional to strain due to surface-tip interaction.
A variety of microfluidic devices are being investigated such as micro-pumps which are capable of pumping fluids and gases, micro-flowsensors and mixers. These devices can be integrated on a microfluidic circuit board to realise systems that are suitable for a range of biological and chemical applications. Examples include polymerese chain reaction chambers (PCR) for DNA amplification, fully automated DNA analysis systems, chemical synthesis reactors and micro-Total Analysis Systems.
Novel concepts and approaches for micromachined inertial sensors such are accelerometers and gyroscopes are investigated. A micromachined disk will be levitated by electrostatic forces which can sense acceleration along three axes. If the disk is spun about its main axis, it concurrently can sense angular rotation about the two axes. The aim of the project is to design a five-degree of freedom inertial sensor. Furthermore, intelligent interface and closed loop control strategies for inertial sensors are being investigated. The principle relies on an electro-mechanical sigma-delta modulator loop; this approach results in a digital sensor which can directly interface to a DSP and facilitates smart sensors.
This Internet 2 collaborative IPv6 deployment study project was led by Southampton and also featured Lancaster University and UCL. The project covered eight areas of study, from IPv6 routing and addressing through to transition and integration techniques. Overseen by UKERNA, the project has led to a UK IPv6 pilot for IPv6 on JANET (the UK academic network) and to all partners' participation in the 6NET project.
ECS has been running IPv6 on its internal network since 1996. It acquired what we believe was the first UK IPv6 native WAN connection in 1997, to UUNet in Telehouse, London. Since then IPv6 deployment locally has grown, and research has followed from projects including 6INIT, 6WINIT, Bermuda 2, 6NET and Euro6IX. The IPv6 network also covers the teaching labs, where students are able to use IPv6 in coursework and project assignments. The testbed also spans a building-wide wireless LAN, allowing Mobile IPv6 experiments using laptops and PDAs such as the iPAQ running Familiar Linux.